The 90 nm process refers to the technology used in semiconductor manufacturing to create integrated circuits with a minimum feature size of 90 nanometers.
It was commercialized by the 2003–2005 timeframe, by semiconductor companies including Toshiba, Sony, Samsung, IBM, Intel, Fujitsu, TSMC, Elpida, AMD, Infineon, Texas Instruments and Micron Technology.
[2][3][4][5] A 90 nm silicon MOSFET was fabricated by Iranian engineer Ghavam Shahidi (later IBM director) with D.A.
[7][8] IBM demonstrated a 90 nm silicon-on-insulator (SOI) CMOS process, with development led by Shahidi, in 2002.
[11] Gurtej Singh Sandhu of Micron Technology initiated the development of atomic layer deposition high-k films for DRAM memory devices.