Since the rise of multiprocessing central processing units (CPUs), a multiprogramming context has evolved as an extension of the classification system.
Flynn's 1972 paper subdivided SIMD down into three further categories:[2] The modern term for an array processor is "single instruction, multiple threads" (SIMT).
Flynn's original papers cite two historic examples of SIMT processors: SOLOMON and ILLIAC IV.
The Aspex Microelectronics Associative String Processor (ASP)[7] categorised itself in its marketing material as "massive wide SIMD" but had bit-level ALUs and bit-level predication (Flynn's taxonomy: associative processing), and each of the 4096 processors had their own registers and memory (Flynn's taxonomy: array processing).
The Linedancer, released in 2010, contained 4096 2-bit predicated SIMD ALUs, each with its own content-addressable memory, and was capable of 800 billion instructions per second.
[9][10] At the time that Flynn wrote his 1972 paper many systems were using main memory as the resource from which pipelines were reading and writing.
When the resource that all "pipelines" read and write from is the register file rather than main memory, modern variants of SIMD result.
Each processing unit (PU) is shown for a uni-core or multi-core computer: As of 2006[update], all of the top 10 and most of the TOP500 supercomputers are based on a MIMD architecture.
[18] Multiple autonomous processors simultaneously executing the same program (but at independent points, rather than in the lockstep that SIMD imposes) on different data.
A simple Unix shell command like ls | grep "A" | more launches three processes running separate programs in parallel with the output of one used as the input to the next.