Some are considered hardware defects, and if the system is shared, a malicious user can execute them to launch a denial-of-service attack.
The expression catch fire is a facetious exaggeration of the speed with which the CPU chip would be switching some bus circuits, purportedly causing them to overheat and burn.
[3] The Z1 (1938) and Z3 (1941) computers built by Konrad Zuse contained illegal sequences of instructions which damaged the hardware if executed by accident.
The mnemonics are frequently three letters long, such as ADD, CMP (to compare two numbers), and JMP (jump to a different location in the program).
The HCF instruction was originally a fictitious assembly language instruction, said to be under development at IBM for use in their System/360 computers, along with many other amusing three-letter acronyms like XPR (Execute Programmer) and CAI (Corrupt Accounting Information), and similar to other joke mnemonics such as "SDI" for "Self Destruct Immediately"[7] and "CRN" for "Convert to Roman Numerals".
[11] Wheeler noted that Motorola reported 197 valid operation codes for the M6800 processor, and so inferred that with 256 possible 8 bit combinations, there must be 59 invalid instructions.
[11]Another author wrote in 2002: In the old days of the Motorola 6800 microprocessor, instruction code DD caused the processor to go into an endless loop, reading from each memory address in order.
When the 6800 encounters the HCF instruction, the processor never finds the end of it, endlessly incrementing its program counter until the CPU is reset.
Once the processor entered this mode, it is not responsive to interrupts, so normal operation can only be restored by a reset (hence the "Drop Dead" and "Halt and Catch Fire" monikers).
No compiler creates the instruction, but a malicious programmer can insert it into code to render an afflicted computer inoperable until the machine is power-cycled.
[28][29] The pair will only result in a HCF condition if either the /NMI pin is connected directly to the +5V rail, making the generation of that signal impossible, or if the interrupt routine that services /NMI ends with a return, placing it back in the HALT state.
The SM83 processor[a][30] core in the Game Boy's LR35902 system on chip has a similar issue, triggered by two consecutive HALTs with interrupts disabled.