Symmetric multiprocessing
Symmetric multiprocessing or shared-memory multiprocessing[1] (SMP) involves a multiprocessor computer hardware and software architecture where two or more identical processors are connected to a single, shared main memory, have full access to all input and output devices, and are controlled by a single operating system instance that treats all processors equally, reserving none for special purposes.
[2] Culler and Pal-Singh in their 1998 book "Parallel Computer Architecture: A Hardware/Software Approach" mention: "The term SMP is widely used but causes a bit of confusion.
The bottleneck in the scalability of SMP using buses or crossbar switches is the bandwidth and power consumption of the interconnect among the various processors, the memory, and the disk arrays.
A single programming language would have to be able to not only partition the workload, but also comprehend the memory locality, which is severe in a mesh-based architecture.
Supervisor locks were small and used to protect individual common data structures that might be accessed simultaneously from either CPU.
[11] Other mainframes that supported SMP included the UNIVAC 1108 II, released in 1965, which supported up to three CPUs, and the GE-635 and GE-645,[12][13] although GECOS on multiprocessor GE-635 systems ran in a master-slave asymmetric fashion, unlike Multics on multiprocessor GE-645 systems, which ran in a symmetric fashion.
Another early commercial Unix SMP implementation was the NUMA based Honeywell Information Systems Italy XPS-100 designed by Dan Gielan of VAST Corporation in 1985.
Some applications, particularly building software and some distributed computing projects, run faster by a factor of (nearly) the number of additional processors.
A homogeneous processor system typically requires extra registers for "special instructions" such as SIMD (MMX, SSE, etc.
AMP was created well before SMP in terms of handling multiple CPUs, which explains the lack of performance based on the example provided.
Software programs have been developed to schedule jobs and other functions of the computer so that the processor utilization reaches its maximum potential.
Good software packages can achieve this maximum potential by scheduling each CPU separately, as well as being able to integrate multiple SMP machines and clusters.
Access to RAM is serialized; this and cache coherency issues cause performance to lag slightly behind the number of additional processors in the system.
SMP uses a single shared system bus that represents one of the earliest styles of multiprocessor machine architectures, typically used for building smaller computers with up to 8 processors.
Project Kal-El (Tegra 3),[20] patented by NVIDIA, was the first SoC (System on Chip) to implement this new vSMP technology.
Overall this technology addresses the need for increase in battery life performance during active and standby usage by reducing the power consumption in mobile processors.
