The System z10 represents the first model family powered by the z10 quad core processing engine.

It is also possible to configure additional System Assist Processors, but most customers find the mandatory minimum SAP allocation sufficient.

A product in development by Mantissa Corporation, z/VOS, was announced in 2008 to run other operating systems developed for x86 architectures (such as Windows and x86 versions of Linux),[1] later renamed to z86VM[2] and the Linux support is in beta, and "has no plans to support 64 bit", but as of 2019, it has a bug for Windows so not even a beta version for it is available.

The System z10 implements the main IEEE 754 decimal floating point operations in a built-in, integral component of each processor core and instruction set architecture.

As examples, Enterprise PL/I, XL C, and the z/OS Java BigDecimal class can exploit hardware decimal floating point.

The System z10 processor adds numerous new instructions, primarily concentrated on improving the efficiency and performance of compiled code.

In particular, the machine no longer requires immediate, direct contact with IBM for activation of CoD features.

IBM also introduced a new Capacity for Planned Events (CPE) offering, which allows mainframe owners to activate CPU capacity temporarily to facilitate moving machines between data centers, upgrades, and other routine management tasks at a much lower cost.

As the number of cores in the System z machines has grown, IBM engineers have continued to find ways to reduce symmetric multiprocessing (SMP) effects.

HiperDispatch helps maintain near-linear SMP scalability and is more relevant to the larger models, but it is enabled by default on all System z10 machines.

It has the same processor chip design and instruction set as the z10 EC but with higher manufacturing yields (3.5 GHz clock speed, one core per chip disabled) and lower cost processor packaging due to reduced cooling and reduced multi-chip shared cache needs.