UNIVAC II

Addition, subtraction, and multiplication times given below include reading and executing the instruction.

The same relative binary position of the other half-word is held in a core in the same physical location in the other section of the plane.

To write into the memory, the first half of the word is placed in the insertion register and the address selector alerts the appropriate column and the proper row of the top section in each of the 42 planes.

Forty-two pulse times later, the second half word has been placed in the insertion register and the process is repeated in the lower section of the memory.

Word pulses flow from or to the high speed bus and the insertion register via a mechanism which converts from serial to parallel and vice versa, in 42-bit modules.

Their contents are continuously compared so that inconsistencies between the data in the identical units give an indication of faulty operation, and stall the computer.

At several strategic points within Univac, every character is checked for an odd number of pulses.

In addition to the parity bits check on the high-speed bus, a second checker establishes that the invalid "all ones" character is not inadvertently created by a system fault.

An automatic voltage-monitoring system continuously monitors all critical DC potentials giving an alarm if any moves outside the prescribed limits.