[7] On November 12, 2018, the IEEE P802.3cn Task Force started working to define PHY supporting 50-Gbit/s operation over at least 40 km of SMF.
[15] The IEEE P802.3cd [2] standard defines a Physical Coding Sublayer (PCS) in Clause 133 which after encoding gives a data rate of 51.5625 Gbit/s.
802.3cd also defines an RS-FEC for forward error correction in Clause 134 which after FEC encoding gives a data rate of 53.125 Gbit/s.
It is not possible to transmit 53.125 Gbit/s over an electrical interface while maintaining suitable signal integrity so four-level pulse-amplitude modulation (PAM4) is used to map pairs of bits into a single symbol.
As of June 2016[update], 25 Gigabit Ethernet equipment is available on the market using the SFP28 and QSFP28 transceiver form factors.