8250 UART

The 8250 UART (universal asynchronous receiver-transmitter) is an integrated circuit designed for implementing the interface for serial communications.

The 16450(A) UART, commonly used in IBM PC/AT-series computers, improved on the 8250 by permitting higher serial line speeds.

With the introduction of multitasking operating systems on PC hardware, such as OS/2, Windows NT or various flavours of UNIX, the short time available to serve character-by-character interrupt requests became a problem, therefore the IBM PS/2 serial ports introduced the 16550(A) UARTs that had a built-in 16 byte FIFO or buffer memory to collect incoming characters.

Later models added larger memories, supported higher speeds, combined multiple ports on one chip and finally became part of the now-common Super I/O circuits combining most input/output logic on a PC motherboard.

The interrupt line will (when the IER bit has enabled it) be triggered to go high when one of the following events occur: Receiver line status, Received data available, Transmitter holding register empty, and MODEM status.