Charge-pump phase-locked loop
Charge-pump phase-locked loop (CP-PLL) is a modification of phase-locked loops with phase-frequency detectors and square waveform signals.
[1] A CP-PLL allows for a quick lock of the phase of the incoming signal, achieving low steady state phase error.
[2] Phase-frequency detector (PFD) is triggered by the trailing edges of the reference (Ref) and controlled (VCO) signals.
A trailing edge of the reference signal forces the PFD to switch to a higher state, unless it is already in the state
A trailing edge of the VCO signal forces the PFD to switch to a lower state, unless it is already in the state
If both trailing edges happen at the same time, then the PFD switches to zero.
A first linear mathematical model of second-order CP-PLL was suggested by F. Gardner in 1980.
[2] A nonlinear model without the VCO overload was suggested by M. van Paemel in 1994 [3] and then refined by N. Kuznetsov et al. in 2019.
[4] The closed form mathematical model of CP-PLL taking into account the VCO overload is derived in.
[5] These mathematical models of CP-PLL allow to get analytical estimations of the hold-in range (a maximum range of the input signal period such that there exists a locked state at which the VCO is not overloaded) and the pull-in range (a maximum range of the input signal period within the hold-in range such that for any initial state the CP-PLL acquires a locked state).
[6] Gardner's analysis is based on the following approximation:[2] time interval on which PFD has non-zero state on each period of reference signal is Then averaged output of charge-pump PFD is with corresponding transfer function Using filter transfer function
one gets Gardner's linear approximated average model of second-order CP-PLL In 1980, F. Gardner, based on the above reasoning, conjectured that transient response of practical charge-pump PLL's can be expected to be nearly the same as the response of the equivalent classical PLL[2]: 1856 (Gardner's conjecture on CP-PLL[7]).
Following Gardner's results, by analogy with the Egan conjecture on the pull-in range of type 2 APLL, Amr M. Fahim conjectured in his book[8]: 6 that in order to have an infinite pull-in(capture) range, an active filter must be used for the loop filter in CP-PLL (Fahim-Egan's conjecture on the pull-in range of type II CP-PLL).
Without loss of generality it is supposed that trailing edges of the VCO and Ref signals occur when the corresponding phase reaches an integer number.
Let the time instance of the first trailing edge of the Ref signal is defined as
is determined by the PFD initial state
, the initial phase shifts of the VCO
for a proportionally integrating (perfect PI) filter based on resistor and capacitor is as follows where
is the VCO free-running (quiescent) frequency (i.e. for
Finally, the continuous time nonlinear mathematical model of CP-PLL is as follows with the following discontinuous piece-wise constant nonlinearity and the initial conditions
This model is a nonlinear, non-autonomous, discontinuous, switching system.
The reference signal frequency is assumed to be constant:
are a period, frequency and a phase of the reference signal.
the first instant of time such that the PFD output becomes zero (if
Finally, the discrete-time model of second order CP-PLL without the VCO overload[4][6] where This discrete-time model has the only one steady state at
and allows to estimate the hold-in and pull-in ranges.
, then the additional cases of the CP-PLL dynamics have to be taken into account.
[5] For any parameters the VCO overload may occur for sufficiently large frequency difference between the VCO and reference signals.
In practice the VCO overload should be avoided.
Derivation of nonlinear mathematical models of high-order CP-PLL leads to transcendental phase equations that cannot be solved analytically and require numerical approaches like the classical fixed-point method or the Newton-Raphson approach.
