[1][2] One simple scheme to perform this function scatters the bits of a Hamming code ECC word across multiple memory chips, such that the failure of any single memory chip will affect only one ECC bit per word.
An important RAS feature, Chipkill technology is deployed primarily on SSDs, mainframes, and midrange servers.
A similar system from Intel, called Lockstep memory, provides double-device data correction (DDDC) functionality.
[4] Similar systems from Micron, called redundant array of independent NAND (RAIN), and from SandForce, called RAISE level 2, protect data stored on SSDs from any single NAND flash chip failure.
[5][6] A 2009 paper using data from Google's data centers[7] provided evidence demonstrating that in observed Google systems, DRAM errors were recurrent at the same location, and that 8% of DIMMs were affected each year.