The Nova line was succeeded by the Data General Eclipse, which was similar in most ways but added virtual memory support and other features required by modern operating systems.

Edson de Castro was the Product Manager of the pioneering Digital Equipment Corporation (DEC) PDP-8, a 12-bit computer widely referred to as the first true minicomputer.

de Castro concluded that the 8/I could be produced using fully automated assembly on large boards, which would have been impossible only a year earlier.

[4] Late in 1967, Richman introduced the group to New York-based lawyer Fred Adler, who began canvassing various funding sources for seed capital.

They had a bit of luck because the Fall Joint Computer Conference had been delayed until December that year, so they were able to bring a working unit to San Francisco where they ran a version of Spacewar!.

"[12] The basic model was not very useful out of the box, and adding 8 kW (16 kB) RAM in the form of core memory typically brought the price up to US$7,995.

Two major changes had taken place since the Nova was designed; one was that Signetics had introduced the 8260, a 4-bit IC that combined an adder, XNOR and AND, meaning the number of chips needed to implement the basic logic was reduced by about three times.

Although the initial models still used core, the entire design was based on the premise that faster semiconductor memories would become available and the platform could make full use of them.

Seligman's repackaged four-ALU SuperNOVA was released in 1971 as the Nova 800, resulting in the somewhat confusing naming where the lower-numbered model has higher performance.

Given the scope of the project, they agreed that the entire effort should be handled off-site, and Gruner selected a location at Research Triangle Park in North Carolina.

The Nova 2 was essentially a simplified version of the earlier machines as increasing chip densities allowed the CPU to be reduced in size.

[citation needed] However, continued demand led to a Nova 4 machine introduced in 1978, this time based on four AMD Am2901 bit-slice ALUs.

This meant that reads and writes to memory required two cycles, and that the machine ran about half the speed of the original Nova as a result.

Enterprise shipped in 1981, running RDOS, but the introduction of the IBM PC the same year made most other machines disappear under the radar.

The core on this 8K word memory board occupied a centrally located "board-on-a-board", 5.25" wide by 6.125" high, and was covered by a protective plate.

The original Nova machines ran at approximately 200 kHz, but its SuperNova was designed to run at up to 3 MHz when used with special semiconductor main memory.

In addition to its dedicated I/O bus structure, the Nova backplane had wire wrap pins that could be used for non-standard connectors or other special purposes.

As the product grew, Data General developed many languages for the Nova computers, running under a range of consistent operating systems.

Third-party vendors and the user community expanded the offerings with Forth, Lisp, BCPL, C, ALGOL, and other proprietary versions of COBOL and BASIC.

All arithmetic instructions included a two-bit field which could be used to specify a shift option, which would be applied to the result before it was loaded into the destination register.

For the ISZ and DSZ instructions, the increment or decrement occurred between the memory location being read and the write-back; the CPU simply waited to be told if the result was zero or nonzero.

This was the standard method for making an RDOS system call on early Nova models; the assembly language mnemonic ".SYSTM" translated to this.

As in the case above, if COUNT is assumed to be in .NREL space, this is equivalent to: DSZ 1,(COUNT-(.+1)) The Novas implemented a channelized model for interfacing to I/O devices.

This meant that, in the case of simultaneous interrupt requests, the device that had priority was determined by which one was physically closest to the CPU in the card cage.

This was enough time to stop I/O in progress, by issuing an IORST instruction, and then save the contents of the four accumulators and the carry bit to memory.

This was expected to be the address of an operating system service routine that would reload the accumulators and carry bit, and then resume normal processing.

Pressing START transferred the value currently set in data switches 1–15 to the program counter, and then began executing from there.

Pressing DEPOSIT wrote the value contained in the data switches to the memory location pointed at by the program counter.

When this switch was triggered, it caused the 32-word boot ROM to be mapped over the first 32 words of memory, set the program counter to 0, and started the CPU.

On systems with magnetic core memory, the LOCK position also enabled the auto power failure recovery function.