Firefly (cache coherence protocol)

The Firefly cache coherence protocol is the schema used in the DEC Firefly multiprocessor workstation, developed by DEC Systems Research Center.

Unlike the Dragon protocol, the Firefly protocol updates the Main Memory as well as the Local caches on Write Update Bus Transition.

In order to identify which transitions must be made, the protocol detects sharing using a special bus line named CopiesExist.

An arrow that goes from nowhere to a state represents a newly loaded block.

If there's a CPU read hit, the block stays in whatever state it is already in—just like in the Dragon protocol.

Unlike MESI, in the Firefly update protocol, write propagation is ensured by directly updating all other copies on a write request by the processors (PrWr).

Due to the fact that updated copies of the data exist in caches, there are fewer coherence misses than in Write – Invalidate policies.