Holdover in synchronization applications
[3]The quote above suggests that one can think of holdover in synchronization applications as analogous to running on backup power.
The base station needs a way to establish accurate frequency and phase (to know what time it is) using internal (or local) resources, and that’s where the function of holdover becomes important.
A key application for GPS in telecommunications is to provide synchronization in wireless basestations.
Base stations depend on timing to operate correctly, particularly for the handoff that occurs when a user moves from one cell to another.
[4] In these applications holdover is used in base stations to ensure continued operation while GPS is unavailable and to reduce the costs associated with emergency repairs, since holdover allows the site to continue to function correctly until maintenance can be performed at a convenient time.
[5] Some of the most stringent requirements come from the newer generation of wireless base stations, where phase accuracy targets as low as 1μs need to be maintained for correct operation.
[6] However the need for accurate timing has been an integral part of the history of wireless communication systems as well as wireline,[7] and it has been suggested that the search for reliable and cost effective timing solutions was spurred on by the need for CDMA to compete with lower cost solutions.
[8] Within the base station, besides standard functions, accurate timing and the means to maintain it through holdover is vitally important for services such as E911[5] GPS as a source of timing is a key component in not just Synchronization in telecommunications but to critical infrastructure in general.
[9] Of the 18 Critical Resource and Key infrastructure (CIKR[10])sectors, 15 use GPS derived timing to function correctly.
[11] One notable application where highly accurate timing accuracy (and the means to maintain it through holdover) is of importance is in the use of Synchrophasors in the power industry to detect line faults.
[12] GPS is sensitive to jamming and interference because the signal levels are so low[13] and can easily be swamped by other sources, that can be accidental or deliberate.
In Synchronization in telecommunications applications holdover is defined by ETSI as: An operating condition of a clock which has lost its controlling input and is using stored data, acquired while in locked operation, to control its output.
The stored data are used to control phase and frequency variations, allowing the locked condition to be reproduced within specifications.
Holdover begins when the clock output no longer reflects the influence of a connected external reference, or transition from it.
Holdover terminates when the output of the clock reverts to locked mode condition.
For example, a GPS disciplined oscillator (GPSDO) usually consists of a quartz or rubidium oscillator whose output frequency is continuously steered to agree with signals broadcast by the GPS satellites.
[20] In a GPSDO a GPS or GNSS signal is used as the external reference that steers an internal oscillator.
[8] Amongst the building blocks of a GPS Time and Frequency solution the oscillator is a key component[11] and typically they are built around an Oven Controlled Crystal Oscillator (OCXO) or a Rubidium based clock.
The dominant factors influencing the quality of the reference oscillator are taken to be aging and temperature stability.
[citation needed] What is often referred to as "random walk" instability is actually a deterministic effect of environmental parameters.
An addition of a Microprocessor to the reference oscillator can improve temperature stability and aging performance[21] During Holdover any remaining clock error caused by aging and temperature instability can be corrected by control mechanisms.
[22] A combination of quartz based reference oscillator (such as an OCXO) and modern correction algorithms can get good results in Holdover applications.
[23] The earliest documentation of such an effort comes from the then National Bureau of Standards in 1968 [Allan, Fey, Machlan and Barnes, "An Ultra Precise Time Synchronization System Designed By Computer Simulation", Frequency], where an analog computer consisting of ball-disk integrators implemented a third order control loop to correct for the frequency ageing of an oscillator.
The first microprocessor implementation of this concept occurred in 1983 [Bourke, Penrod, "An Analysis of a Microprocessor Controlled Disciplined Frequency Standard", Frequency Control Symposium] where Loran-C broadcasts were used to discipline very high quality quartz oscillators as a caesium replacement in telecommunications wireline network synchronization.
The basic aim of a steering mechanism is to improve the stability of a clock or oscillator while minimizing the number of times it needs calibration.
[1] In Holdover the learned behaviour of the OCXO is used to anticipate and correct for future behavior.
[2] Effective aging and temperature compensation can be provided by such a mechanism[24] and the system designer is faced with a range of choices for algorithms and techniques to do this correction including extrapolation, interpolation and predictive filters (including Kalman filters).
[25][26] Once the barriers of aging and environmental effects are removed the only theoretical limitation to holdover performance in such a GPSDO is irregularity or noise in the drift rate, which is quantified using a metric like Allan deviation or Time deviation.
The complexity in trying to predict the effects on Holdover due to systematic effects like aging and temperature stability and stochastic influences like Random Walk noise has resulted in tailor-made Holdover Oscillator solutions being introduced in the market.
