On processor architectures on which Windows runs, hardware generates signals that are sent to an interrupt controller.
If a signal comes in at a higher priority, then the current interrupt will be put into a pending state; the CPU sets the interrupt mask to the priority and places any interrupts with a lower priority into a pending state until the CPU finishes handling the new, higher priority interrupt.
The mappings in this table are called Interrupt Request Levels, or IRQLs, and a separate IRQL is kept for each processor in a multiprocessor system.
The IRQL values are specific to the x86, IA64 and AMD64 processor architectures that Windows can run on, though theoretically they can support other CPUs that use a similar interrupt scheme (such as the DEC Alpha and MIPS, which were supported briefly on early versions of Windows).
This means that APCs (asynchronous procedure calls), user threads and kernel mode operations can be interrupted, and the system must run them at an IRQL lower than the thread scheduler (or "dispatcher").