An instruction set simulator (ISS) is a simulation model, usually coded in a high-level programming language, which mimics the behavior of a mainframe or microprocessor by "reading" instructions and maintaining internal variables which represent the processor's registers.
Thereafter, execution proceeds as follows: For test and debugging purposes, the monitoring program can provide facilities to view and alter registers, memory, and restart location or obtain a mini core dump or print symbolic program names with current data values.
Checking for valid memory locations or for conditional "pause"s add considerably to the overhead but optimization techniques can reduce this to acceptable levels.
In addition, a full instruction trace can be used to test actual (executed) code coverage.
If the monitoring program shifts the load point, it may pick up say X"FF" and the logic would cause different results during a comparison operation.
Alternatively, if the monitoring program is now occupying the space where the value is being "picked up" from, similar results might occur.
In this role it can be considered a form of performance analysis as it is not easy to obtain these statistics under normal execution and this is especially true for high level language programs which effectively 'disguise' the extent of machine code instructions by their nature.