Kahn process networks

Due to these key restrictions, the resulting process network exhibits deterministic behavior that does not depend on the timing of computation nor on communication delays.

Processes read and write atomic data elements, alternatively called tokens, from and to channels.

Processes are not allowed to test an input channel for existence of tokens without consuming them.

Timing or execution order of processes must not affect the result and therefore testing input channels for tokens is forbidden.

[2] The single token in the PE resource place forbids the process from executing simultaneously for different input data.

The number of unconsumed tokens depends on the execution order (scheduling) of processes.

The maximum capacity of FIFOs can be handled in several ways: A closed KPN has no external input or output channels.

Processes can be modeled as sequential programs that do reads and writes to ports in any order or quantity as long as determinism property is preserved.

In a KPN there is a total order of events[clarification needed] inside a signal.

The Ambric Am2045 massively parallel processor array is a KPN implemented in actual silicon.

The AI Engine's in some AMD Xilinx Versals are building blocks of a Kahn Process Network.

A Kahn process network with three processes (vertices) and three communication channels (edges). During its execution, the process P reads from channels A and B and writes to channel C.
Firing semantics of process P modeled with a Petri net displayed in the image above
A finite state machine of a process