NEAT chipset

The NEAT chipset (the acronym standing for "New Enhanced AT") is a 4 chip VLSI implementation (including the 82C206 IPC) of the control logic used in the IBM PC compatible PC/AT computers.

NEAT, official designation CS8221, was developed by Chips and Technologies.

82C100 incorporates the functionality of what had been, until its invention, discrete TTL chips on the XT's mainboard, namely:[3] IBM PC compatibility is provided by C&T's 82C206 Integrated Peripheral Controller (IPC), introduced by C&T in 1986.

This chip, like its predecessor the 82C100, provides equivalent functionality to the TTL chips on the PC/AT's mainboard, namely:[1] NEAT CS8221's predecessor, called CS8220, requires five chips[4] (buffers and memory controllers) for a virtually complete motherboard, while NEAT requires four, and added support for separate ISA bus clocks.

The 82C495XLC incorporates the additional memory controller and shadow RAM support.