In order to compete with Intel's Advanced Programmable Interrupt Controller (APIC), which had enabled the first Intel 486-based multiprocessor systems, in early 1995 AMD and Cyrix proposed as somewhat similar-in-purpose OpenPIC architecture supporting up to 32 processors.
IBM however developed their Multiprocessor Interrupt Controller (MPIC) based on the OpenPIC register specification.
[4] Through various implementations, the MPIC was included in PowerPC reference designs and some retail computers.
[7] The Apple implementation of "Open PIC" (as the Apple documentation of this era spells it) in their first MIO chip for the Common Hardware Reference Platform was based on version 1.2 of the register specification and supported up to two processors and up to 20 interrupt sources.
[9][10] Freescale also uses a MPIC ("compatible with the Open PIC") on all its PowerQUICC and QorIQ processors.