SGI Challenge

The Challenge, code-named Eveready (deskside models) and Terminator (rackmount models), is a family of server computers and supercomputers developed and manufactured by Silicon Graphics in the early to mid-1990s that succeeded the earlier Power Series systems (not to be confused with IBM Power Systems).

During the final years of the Challenge architecture's useful life, the line was upgraded to support R10000 microprocessors.

Standard models were either servers or supercomputers with no graphics support.

The POWER Challenge was announced on 28 January 1993[1] and was intended to compete against supercomputer companies such as Cray Research.

[1] The new model was introduced in the middle of 1994 and used the MIPS R8000 microprocessor chip set, which consisted of the R8000 microprocessor and R8010 floating point unit accompanied by a "streaming" cache and its associated controllers.

[2] As a result, the R8000 had features such as fused multiply–add instructions and a large cache.

[2] In 1995, Silicon Graphics upgraded the POWER Challenge with R8000 microprocessors clocked at 90 MHz, enabling the system to scale up to 6.48 GFLOPS, an improvement of 1 GFLOPS over the previous R8000 microprocessor clocked at 75 MHz.

The deskside enclosure is predominately black with a vertical blue strip on right side.

The midplane in DM and L models contains five Ebus slots that can support a combination of three CPU, one memory or two POWERchannel-2 interface boards.

The midplane in XL models contains fifteen Ebus slots that can support a combination of nine CPU, eight memory or five POWERchannel-2 interface boards.

Fast page mode (FPM) error correcting code (ECC) SIMMs with capacities of 16 MB (known as the "high-density" SIMM) and 64 MB (known as the "super-density" SIMM) are supported, enables the board to provide 64 MB to 2 GB of memory.

[6] Memory transactions are 128-byte wide, the same width as the cache line of the MIPS microprocessors used.