The SW26010 is a 260-core manycore processor designed by the Shanghai Integrated Circuit Technology and Industry Promotion Center (ICC for short)(Chinese: 上海集成电路技术与产业促进中心 (简称ICC)).
The CPEs support SIMD instructions and are capable of performing eight double-precision floating-point operations per cycle.
Each cluster is accompanied by a more conventional general-purpose core called the Management Processing Element (MPE) that provides supervisory functions.
[1] Each cluster has its own dedicated DDR3 SDRAM controller and a memory bank with its own address space.
The data exchange between every two CPEs in the same CPE cluster is achieved through the Remote Memory Access (RMA) interface (a replacement of the register communication feature in the previous generation).