Network on a chip

The modules on the IC are typically semiconductor IP cores schematizing various functions of the computer system, and are designed to be modular in the sense of network science.

[citation needed] In 2000s, researchers had started to propose a type of on-chip interconnection in the form of packet switching networks[1] in order to address the scalability issues of bus-based design.

[3] NoCs improve the scalability of systems-on-chip and the power efficiency of complex SoCs compared to other communication subsystem designs.

NoCs support globally asynchronous, locally synchronous electronics architectures, allowing each processor core or functional unit on the System-on-Chip to have its own clock domain.

think that NoCs need to support quality of service (QoS), namely achieve the various requirements in terms of throughput, end-to-end delays, fairness,[6] and deadlines.

[citation needed] Real-time computation, including audio and video playback, is one reason for providing QoS support.

However, current system implementations like VxWorks, RTLinux or QNX are able to achieve sub-millisecond real-time computing without special hardware.

Another motivation for NoC-level quality of service (QoS) is to support multiple concurrent users sharing resources of a single chip multiprocessor in a public cloud computing infrastructure.

Accordingly, switches can be augmented with simple tracking and forwarding elements to detect which cache blocks will be requested in the future by which cores.

Adapted from Avinoam Kolodny's's column in the ACM SIGDA e-newsletter by Igor Markov The original text can be found at http://www.sigda.org/newsletter/2006/060415.txt