The Sparcle is an experimental 32-bit microprocessor chip developed in 1992 by a consortium of MIT, LSI Corporation, and Sun Microsystems.
It was an evolution Sun's SPARC RISC architecture with features geared towards "large-scale multiprocessing".
Besides these enhancements the Sparcle was otherwise unremarkable, incorporating 200,000 transistors and dissipating two watts.
It included no cache and had a clock speed of less than 40 MHz.
The new features included: The Sparcle was used to build the experimental Alewife computer at MIT.