Foundational work in stream processing was initiated in 1995 by a research team led by MIT professor Bill Dally.

In 1996, he moved to Stanford University where he continued this work, receiving a multimillion-dollar grant from DARPA with additional resources from Intel and Texas Instruments to fund the development of a project called "Imagine" - the first stream processor chip and accompanying compiler tools.

The main deliverables from the Imagine program included: Dally, together with other team members, obtained a license from Stanford to commercialize the resulting technology.

Professor Dally remained at Stanford and the company hired industry veteran Chip Stearns to become the President and CEO in December of that year.

The company launched its first two products concurrently with the International Solid State Circuits Conference (ISSCC) in February, 2006[2] and has introduced two others since.

In the summer of 2009 CEO Stearns left the company and was replaced by Mike Fister, an executive with senior level experience at Cadence Design Systems and Intel.

The compiler analyses data live times of streams to optimize allocation and minimize external memory bandwidth needs.

Streams and kernels loads can overlap with execution to improve latency tolerance and the explicit data movement provides predictable performance.

For users that use libraries, and don't intend to develop DSP code, the architecture is a MIPS-based system-on-a-chip with an API to a “black box” coprocessor.

SPI's RapiDev Tools Suite leverages the predictability of stream processing to provide a fast path to optimized results using C programming.

Because kernels are statically scheduled and data movement is explicit, DPU cycle-accuracy can be obtained even at this functional high level.