The TurboSPARC is a microprocessor that implements the SPARC V8 instruction set architecture (ISA) developed by Fujitsu Microelectronics, Inc. (FMI), the United States subsidiary of the Japanese multinational information technology equipment and services company Fujitsu Limited located in San Jose, California.

It was a low-end microprocessor primarily developed as an upgrade for the Sun Microsystems microSPARC-II-based SPARCstation 5 workstation.

[1] The TurboSPARC was mostly succeeded in the low-end SPARC market by the UltraSPARC IIi in late 1997, but remained available.

The cache was built from 12 ns pipelined burst static random access memory (PBSRAM).

Memory controller supported 8 to 256 MB of fast page mode (FPM) DRAM in eight banks.

The TurboSPARC contained 3.0 million transistors and measured 11.5 by 11.5 mm for a die area of 132.25 mm2.

[2] The TurboSPARC was packaged in a 416-ball plastic ball grid array (PBGA).