Vijay is a co-director of the Microsystems Design Lab and a Fellow of the National Academy of Inventors, IEEE, and ACM Vijaykrishnan Narayanan received his B.E.
Excessive power consumption is a key limiter to the design of modern computer systems ranging from large data centers to tiny and pervasive embedded internet of things.
In work that received the ASPDAC Ten-Year Retrospective Most Influential Paper Award in 2012, Vijay proposed new techniques for controlling runtime leakage power.
His work developed the first (Computer Aided Design) techniques to address leakage power reduction in FPGAs (with Xilinx, the leading FPGA company) and received a most significant retrospective award in 25 years of Field programmable logic conference.
Since emerging devices are often not drop-in replacements for CMOS or offer unique characteristics to leverage at higher levels of abstraction, Narayanan’s unique cross layer explorations spanning the entire computing stack – devices, circuits, architecture, and systems was recognized with the IEEE Computer Society Technical Achievement Award.
In the DARPA Neovision program, his team demonstrated brain-inspired vision systems that reduced power consumption of contemporary state-of-the-art by two orders of magnitude.
Global Foundries, Samsung and Micron) towards replacing the 50 year von Neumann computing paradigm that treats memory and processing distinct through novel processing-in-memory systems.
Narayanan has served as the elected chair of the ACM Special Interest Group on Design Automation, overseeing technical conferences in EDA.
He co-chaired the International Symposium on Low Power Electronics and Design and has been involved in the steering committees of various conferences on VLSI and EDA.