Cache (computing)
There is also a tradeoff between high-performance technologies such as SRAM and cheaper, easily mass-produced commodities such as DRAM, flash, or hard disks.
A larger resource incurs a significant latency for access – e.g. it can take hundreds of clock cycles for a modern 4 GHz processor to reach DRAM.
Prediction or explicit prefetching can be used to guess where future reads will come from and make requests ahead of time; if done optimally, the latency is bypassed altogether.
The use of a cache also allows for higher throughput from the underlying resource, by assembling multiple fine-grain transfers into larger, more efficient requests.
In the case of DRAM circuits, the additional throughput may be gained by using a wider data bus.
Central processing units (CPUs), solid-state drives (SSDs) and hard disk drives (HDDs) frequently include hardware-based cache, while web browsers and web servers commonly rely on software caching.
[7] Some examples of caches with a specific function are the D-cache, I-cache and the translation lookaside buffer for the memory management unit (MMU).
Earlier graphics processing units (GPUs) often had limited read-only texture caches and used swizzling to improve 2D locality of reference.
Caching was important to leverage 32-bit (and wider) transfers for texture data that was often as little as 4 bits per pixel.
These caches have grown to handle synchronization primitives between threads and atomic operations, and interface with a CPU-style MMU.
Various cache replication and eviction schemes for different ICN architectures and applications have been proposed.
[citation needed] The time aware least recently used (TLRU) is a variant of LRU designed for the situation where the stored contents in cache have a valid lifetime.
Owing to this locality-based time stamp, TTU provides more control to the local administrator to regulate in-network storage.
An optimization by edge-servers to truncate the GPS coordinates to fewer decimal places meant that the cached results from a nearby query would be used.
Finally, a fast local hard disk drive can also cache information held on even slower data storage devices, such as remote servers (web cache) or local tape drives or optical jukeboxes; such a scheme is the main concept of hierarchical storage management.
Similarly, decentralised equivalents exist, which allow communities to perform the same task for P2P traffic, for example, Corelli.
Memoization is an optimization technique that stores the results of resource-consuming function calls within a lookup table, allowing subsequent calls to reuse the stored results and avoid repeated computation.
It is related to the dynamic programming algorithm design methodology, which can also be thought of as a means of caching.
CDNs began in the late 1990s as a way to speed up the delivery of static content, such as HTML pages, images and videos.
By replicating content on multiple servers around the world and delivering it to users based on their location, CDNs can significantly improve the speed and availability of a website or application.
Cloud storage gateways also provide additional benefits such as accessing cloud object storage through traditional file serving protocols as well as continued access to cached data during connectivity outages.
[17] The BIND DNS daemon caches a mapping of domain names to IP addresses, as does a resolver library.
Search engines also frequently make web pages they have indexed available from their cache.
A distributed cache[18] uses networked hosts to provide scalability, reliability and performance to the application.
Operating system kernel also manages a portion of main memory as the cache / buffer for slower devices such as sound cards and network interface controllers.
Buffering, on the other hand, With typical caching implementations, a data item that is read or written for the first time is effectively being buffered; and in the case of a write, mostly realizing a performance increase for the application from where the write originated.
A buffer is a temporary memory location that is traditionally used because CPU instructions cannot directly address data stored in peripheral devices.
A part of the increase similarly comes from the possibility that multiple small transfers will combine into one large block.
