XNOR gate

The XNOR gate (sometimes ENOR, EXNOR, NXOR, XAND and pronounced as Exclusive NOR) is a digital logic gate whose function is the logical complement of the Exclusive OR (XOR) gate.

) from mathematical logic, also known as the material biconditional.

The two-input version implements logical equality, behaving according to the truth table to the right, and hence the gate is sometimes called an "equivalence gate".

A high output (1) results if both of the inputs to the gate are the same.

If one but not both inputs are high (1), a low output (0) results.

The algebraic notation used to represent the XNOR operation is

both represent the XNOR gate with inputs A and B.

XNOR gates are represented in most TTL and CMOS IC families.

Both include four independent, two-input, XNOR gates.

Both the TTL 74LS implementation, the 74LS266, as well as the CMOS gates (CD4077, 74HC4077 and 74HC266 and so on) are available from most semiconductor manufacturers such as Texas Instruments or NXP, etc.

[2] They are usually available in both through-hole DIP and SOIC formats (SOIC-14, SOC-14 or TSSOP-14).

An alternative, which is useful when inverted inputs are also available (for example from a flip-flop), uses a 2-2 AND-OR-Invert gate, shown on below on the right.

CMOS implementations based on the OAI logic above can be realized with 10 transistors, as shown below.

have the same pinout diagram, as follows: Pinout diagram of the 74HC266N, 74LS266 and CD4077 quad XNOR plastic dual in-line package 14-pin package (PDIP-14) ICs.

If a specific type of gate is not available, a circuit that implements the same function can be constructed from other available gates.

A circuit implementing an XNOR function can be trivially constructed from an XOR gate followed by a NOT gate.

However, this approach requires five gates of three different kinds.

As alternative, if different gates are available we can apply Boolean algebra to transform

as stated above, and apply de Morgan's Law to the last term to get

An alternative arrangement is of five NAND gates in a topology that emphasizes the construction of the function from

Another alternative arrangement is of five NOR gates in a topology that emphasizes the construction of the function from

For the NAND constructions, the lower arrangement offers the advantage of a shorter propagation delay (the time delay between an input changing and the output changing).

For the NOR constructions, the upper arrangement requires fewer gates.

However, extending the concept of the binary logical operation to three inputs, the SN74S135 with two shared "C" and four independent "A" and "B" inputs for its four outputs, was a device that followed the truth table: This is effectively Q = NOT ((A XOR B) XOR C).

It does not implement a logical "equivalence" function, unlike two-input XNOR gates.