Zilog Z8000

Bernard Peuto designed the architecture, while Masatoshi Shima did the logic and physical implementation, assisted by a small group.

It was released after the 16-bit 8086 (April 1978) and the same time as the less-expensive 8088, and only months before the 68000 (September 1979) with a 32-bit instruction set architecture and which is roughly twice as fast.

Faggin left on 31 October 1974, joined by Ralph Ungermann and, later, the logic designer Masatoshi Shima.

[2] Initially working on a concept for a simple microcontroller, Faggin eventually concluded that the economics of the industry demanded that they introduce a product at the high-end, not the low-end.

The Z80 was a significant advance on the 8080, running on a single +5V power supply and adding several nice features from the Motorola 6800.

Peuto had previously studied and published extensively on the topic of word length, instruction sets and code density.

The initial meetings on the concept were held at the end of March, at which time Faggin told Peuto he wanted the architecture completed in three months.

[6] Peuto's design included the ability to work with 8-, 16- and 32-bit data, flexible addressing modes, and dedicated coprocessor support.

But very late in the process the design team concluded that it needed more, and when they asked in October, Shima stated he had laid it out with enough room left over that they could double the number of registers.

This meant that for 18 months, Intel had a single-chip solution that could access 1 MB, while the 8000 series was still practically limited to 64 kB.

It also offered all of the features Zilog advertised as being more advanced than the 8086, such as more registers and a wide set of addressing modes.

Having separate modes and stacks greatly adds to the performance of context switches between user programs and an operating system.

This was implemented via a separate Refresh Counter (RC) register that held the currently updating page of memory.

A Z8010 has 64 segment descriptor registers, each of which contains a 16-bit base physical address, an 8-bit limit, and an 8-bit set of attributes.

The advantage to this access scheme is that it is easy to read or write 2 KB blocks to a hard drive, so this pattern more closely matches what will ultimately happen on a pagefault.

[15] One uncommon feature found on the Z8000, more commonly associated with minicomputers, is direct support for vectored interrupts.

This was similar to a memory address in a register, consisting of two 16-bit values with the upper 16 bits holding the segment number.

The availability of RM/COBOL allowed many commercial applications to be quickly ported to the S8000 computer although this did not help its long-term success.

[47] Despite a somewhat positive reception as "a reasonably fast supermicro with generally good performance for the price", the 16-bit architectural limitations of the Z8000, with segment handling required to access more than 64 KB in a process, led to questions about the longevity of the Series 8000 products as 32-bit processor architectures from Motorola and National Semiconductor became more widely adopted.

[50] Zilog subsequently announced an agreement to manufacture the WE32100 chipset for a five year period, being the first alternative source of these products.

In one instance, the Z8001 was used to implement a capability-based architecture, employing the segment number in the addressing model of the Z8001 to indicate a capability register in a virtual processor.

[54] The reported inclusion of the device within military designs[55] perhaps provides an explanation for the continued survival of the Z8000, in the shape of the Zilog Z16C01/02 CPUs.

Enterprises had made a number of investments in the computer field, and by the early 1980s was positioning itself as a competitor to IBM in the large system space.

[58] However, Faggin did concede that the segmented architecture of the Z8000 was a disadvantage for emerging "graphics-based applications", where systems such as the Apple Macintosh needed to readily access more than 64 KB of memory in a single address space.

The longer than anticipated process of bringing the product to market was also acknowledged as having contributed to its lack of adoption, Faggin noting that "being first and having the strongest marketing and the strongest momentum", as Intel had found itself with the 8086, would have been the only remaining route to success for a product of this kind.

For those looking for a low-cost option able to access (what was then) large amounts of memory, the Intel designs were competitive and available over a year earlier.

The 16/32-bit 8 MHz Motorola 68000 came to market later the same year and turns in a time of 0.49 seconds on the same Sieve test, over twice as fast as the Z8000.

[60] Although it used an even larger 64-pin DIP layout, for those willing to move to more than 40 pins this was a small price to pay for what was by far the fastest processor of its era.

This was due to its complex instruction decoder, which, unlike most processors of the era, did not use microcode and was dependent on logic implemented directly in the CPU.

This allowed the design to eliminate the microcode storage and the associated decoding logic, which reduced the transistor count to 17,500.