The ARM Cortex-A9 MPCore is a 32-bit multi-core processor that provides up to 4 cache-coherent cores, each implementing the ARM v7 architecture instruction set.

[1] It was introduced in 2007.

[2] Key features of the Cortex-A9 core are:[3] ARM states that the TSMC 40G hard macro implementation typically operates at 2 GHz; a single core (excluding caches) occupies less than 1.5 mm2 when designed in a TSMC 65 nanometer (nm) generic process[5] and can be clocked at speeds over 1 GHz, consuming less than 250 mW per core.

[2] Several system on a chip (SoC) devices implement the Cortex-A9 core, including: RZ/A1L plus Ethernet AVB support and a JPEG codec unit, 3MByte RAM SoC