The F16C[1] (previously/informally known as CVT16) instruction set is an x86 instruction set architecture extension which provides support for converting between half-precision and standard IEEE single-precision floating-point formats.
In recent documents, the name F16C is formally used in both Intel and AMD x86-64 architecture specifications.
The instructions are abbreviations for "vector convert packed half to packed single" and vice versa: The 8-bit immediate argument to VCVTPS2PH selects the rounding mode.
Values 0–4 select nearest, down, up, truncate, and the mode set in MXCSR.RC.
Support for these instructions is indicated by bit 29 of ECX after CPUID with EAX=1.