Transactional memory

In computer science and engineering, transactional memory attempts to simplify concurrent programming by allowing a group of load and store instructions to execute in an atomic way.

Transactional memory provides optimistic concurrency control by allowing threads to run in parallel with minimal interference.

Since the programmer is not responsible for explicitly identifying locks or the order in which they are acquired, programs that utilize transactional memory cannot produce a deadlock.

Note that concurrency related bugs are still possible in programs that use a large number of transactions, especially in software implementations where the library provided by the language is unable to enforce correct use.

[2] The abstraction of atomicity in transactional memory requires a hardware mechanism to detect conflicts and undo any changes made to shared data.

Large buffers are used to store speculative values while avoiding write propagation through the underlying cache coherence protocol.

Owing to the more limited nature of hardware transactional memory (in current implementations), software using it may require fairly extensive tuning to fully benefit from it.

Azul Systems also implemented hardware transactional memory to accelerate their Java appliances, but this was similarly hidden from outsiders.

[11] Sun Microsystems implemented hardware transactional memory and a limited form of speculative multithreading in its high-end Rock processor.

The Rock processor was canceled in 2009, just before the acquisition by Oracle; while the actual products were never released, a number of prototype systems were available to researchers.

[11] In 2009, AMD proposed the Advanced Synchronization Facility (ASF), a set of x86 extensions that provide a very limited form of hardware transactional memory support.

The TSX specification describes the transactional memory API for use by software developers, but withholds details on technical implementation.

Atomicity between two parallel transactions with a conflict
Hardware transactional memory using read and write bits