This problem can be solved in two ways: Note: Coherency generally applies only to data (as operands) and not to instructions (see Self-Modifying Code).
The schemes can be classified based on: Three approaches are adopted to maintain the coherency of data.
[4] These protocols are generally classified based only on the cache states (from 3 to 5 and 7 or more) and the transactions between them, but this could create some confusion.
For instance, the 4-state MESI Illinois and 5-state MERSI (R-MESI) IBM / MESIF-Intel protocols are only different implementations of the same functionality (see below).
The terms MESI, MOESI or any subset of them generally refer to a class of protocols instead of a specific one.
Instead in MESI Illinois type and MERSI / MESIF protocols, the cache-to-cache operations are always performed both with clean that with modified data.
However this it is a smaller limit compared to the memory transactions due to the not-intervention, as in case of clean data for MOESI protocol.
(see e.g. "Performance evaluation between MOESI (Shanghai) and MESIF Nehalem-EP"[21]) The most advance systems use only R-MESI / MESIF protocol or the more complete RT-MESI, HRT-ST-MESI and POWER4 IBM protocols that are an enhanced merging of MESI and MOESI protocols Note: Cache-to-cache is an efficient approach in multiprocessor/multicore systems direct connected between them, but less in Remote cache as in NUMA systems where a standard MESI is preferable.
Example in POWER4 IBM protocol "shared intervention" is made only "local" and not between remote module.
- H has the same functionality of I state but in addition with the ability to capture any bus transaction that match the Tag of the directory and to update the data cache.