Communication-avoiding algorithm

Communication-avoiding algorithms minimize movement of data within a memory hierarchy for improving its running-time and energy consumption.

These minimize the total of two costs (in terms of time and energy): arithmetic and communication.

Communication, in this context refers to moving data, either between levels of memory or between multiple processors over a network.

[1] A common computational model in analyzing communication-avoiding algorithms is the two-level memory model: [2] Corollary 6.2: Theorem — Given matrices

This lower bound is achievable by tiling matrix multiplication.

More general results for other numerical linear algebra operations can be found in.

requires the processor to have access to each point within the cube at least once.

lattice points with a minimal amount of communication.

is small, then we can divide the minimal-communication algorithm into separate segments.

be the set of lattice points covered during this segment.

Direct computation verifies that the tiling matrix multiplication algorithm reaches the lower bound.

Consider the following running-time model:[5] ⇒ Total running time = γ·(no.

of words) From the fact that β >> γ as measured in time and energy, communication cost dominates computation cost.

Technological trends[6] indicate that the relative cost of communication is increasing on a variety of platforms, from cloud computing to supercomputers to mobile devices.

The report also predicts that gap between DRAM access time and FLOPs will increase 100× over coming decade to balance power usage between processors and DRAM.

[1] Energy consumption increases by orders of magnitude as we go higher in the memory hierarchy.

United States president Barack Obama cited communication-avoiding algorithms in the FY 2012 Department of Energy budget request to Congress:[1] New Algorithm Improves Performance and Accuracy on Extreme-Scale Computing Systems.

On modern computer architectures, communication between processors takes longer than the performance of a floating-point arithmetic operation by a given processor.

ASCR researchers have developed a new method, derived from commonly used linear algebra methods, to minimize communications between processors and the memory hierarchy, by reformulating the communication patterns specified within the algorithm.

This method has been implemented in the TRILINOS framework, a highly-regarded suite of software, which provides functionality for researchers around the world to solve large scale, complex multi-physics problems.Communication-avoiding algorithms are designed with the following objectives: The following simple example[1] demonstrates how these are achieved.

Let A, B and C be square matrices of order n × n. The following naive algorithm implements C = C + A * B:

Arithmetic cost (time-complexity): n2(2n − 1) for sufficiently large n or O(n3).

Rewriting this algorithm with communication cost labelled at each step Fast memory may be defined as the local processor memory (CPU cache) of size M and slow memory may be defined as the DRAM.

Communication cost (reads/writes): n3 + 3n2 or O(n3) Since total running time = γ·O(n3) + β·O(n3) and β >> γ the communication cost is dominant.

The blocked (tiled) matrix multiplication algorithm[1] reduces this dominant term: Consider A, B and C to be n/b-by-n/b matrices of b-by-b sub-blocks where b is called the block size; assume three b-by-b blocks fit in fast memory.

Communication cost: 2n3/b + 2n2 reads/writes << 2n3 arithmetic cost Making b as large possible: we achieve the following communication lower bound: Most of the approaches investigated in the past to address this problem rely on scheduling or tuning techniques that aim at overlapping communication with computation.

However, this approach can lead to an improvement of at most a factor of two.

Ghosting is a different technique for reducing communication, in which a processor stores and computes redundantly data from neighboring processors for future computations.

Cache-oblivious algorithms represent a different approach introduced in 1999 for fast Fourier transforms,[8] and then extended to graph algorithms, dynamic programming, etc.

They were also applied to several operations in linear algebra[9][10][11] as dense LU and QR factorizations.

Energy cost of data movement in 2010: On-chip vs Off-chip