The DEC 4000 AXP is a series of departmental server computers developed and manufactured by Digital Equipment Corporation introduced on 10 November 1992.
The DEC 4000 AXP was succeeded by the end of 1994 by the AlphaServer 2000 and 2100 departmental servers.
Two C3 (Command, Control and Communication) ASICs on the CPU module provide a number of functions, such as implementing the B-cache controller and the bus interface unit (BIU), which interfaces the microprocessor to the 128-bit address and data multiplexed system bus to enable communication between the CPU, memory and I/O modules.
The memory is implemented using 280 surface mounted dual in-line package (DIP) 4-bit dynamic random access memory (DRAM) chips with capacities of 1, 4 and 16 Mb that reside on both sides of the module.
I/O module features common to both variants are an additional SCSI-2 bus for removable media drives only, a Zilog 85C30 Serial Communications Controller (UART) that provides two serial lines, a Dallas Semiconductor DS1287 real-time clock, and most of the firmware in the DEC 4000 AXP.
For controlling the Futurebus+ and to interface the I/O module to the system bus, two IONIC ASICs are used.
The Ethernet functionality in the I/O function is provided by the TGEC (Third Generation Ethernet Chip), also known as the DC253, while the SCSI/DSSI buses are provided by four NCR 53C710 SCSI/DSSI controllers and their associated DSSI drivers (second I/O module variant only).