DEC J-11

It consisted of a data path chip[1] and a control chip[2] in ceramic leadless packages mounted on a single ceramic hybrid dual inline package (DIP).

[2] An optional separate floating-point accelerator (FPA) chip could be used, and was packaged in a standard DIP.

The data path chip and control chip were fabricated by Intersil in a CMOS process while the FPA was fabricated by Digital in their "ZMOS" NMOS process.

The design originally was intended to support multiple control chips to allow implementation of additional instructions such as the Commercial Instruction Set (CIS), but no such control chips were ever offered.

A clone of the J-11 was manufactured in the Soviet Union under the designation KN1831VM1 (Russian: КН1831ВМ1).