A working group of the IEEE (Institute of Electrical and Electronics Engineers) that is developing a standard for accessing embedded instruments (the IEEE 1687 Internal JTAG standard[1]) defines embedded instrumentation as follows: Any logic structure within a device whose purpose is Design for Test (DFT), Design-for-Debug (DFD), Design-for-Yield (DFY), Test...
[2] Dating back to as early as the 1990s, the electronics industry recognized that design validation, test and debug would be seriously impeded in the near future.
Initially, the impetus behind this recognition and the subsequent development of solutions was the emergence of new semiconductor chip packages such as the ball grid array (BGA) which placed the device's pins beneath the silicon die, making them inaccessible to physical contact with an instrument's or a test system's metal probes.
To overcome the disappearing access for test probes, instrumentation technology began to be embedded into semiconductors and onto printed circuit boards.
In recent years, this situation has been exacerbated by increasingly high-speed serial inter-chip connections (interconnects or buses) on circuit boards as well as by even more complex chip packaging technologies like system-on-a-chip (SOC), system-in-package (SIP) and package-on-package (POP).
These and other developments are making instrumentation embedded into chips a necessity for design validation, test and debug processes.
Another addition to the boundary-scan family of standards has been IEEE 1149.7, which defines a reduced pin-count interface and provides for enhanced software debug.
The following are some of the difficulties that traditional test and measurement instruments are running into as chips, circuit boards and systems continue to become faster, smaller and more complex.
This sort of design validation can make use of a variety of embedded instruments such as bit error rate test (BERT) engines, BIST) for logic devices, margining engines, memory BIST, memory test, random pattern generators and a complete logic analyzer.