Experimental work published in 2011 and 2012 demonstrates significantly greater speedups for advanced PRAM algorithms on XMT prototypes than for the same problems on state-of-the-art multi-core computers.
Work published in 2018 shows that lock-step parallel programming (using ICE) can achieve the same performance as the fastest hand-tuned multi-threaded code on XMT systems.
The work-time (WT) (sometimes called work-depth) framework, introduced by Shiloach & Vishkin (1982), provides a simple way for conceptualizing and describing parallel algorithms.
The inclusion of the suppressed information is, in fact, guided by the proof of a scheduling theorem due to Brent (1974).
The XMT multi-core computer systems provides run-time load-balancing of multi-threaded programs incorporating several patents.
One of them [1] generalizes the program counter concept, which is central to the von Neumann architecture to multi-core hardware.
Since making parallel programming easy is one of the biggest challenges facing computer science today, the demonstration also sought to include teaching the basics of PRAM algorithms and XMTC programming to students ranging from high-school Torbert et al. (2010) to graduate school.