[1][2][3] Synthesis begins with a high-level specification of the problem, where behavior is generally decoupled from low-level circuit mechanics such as clock-level timing.
Early HLS explored a variety of input specification languages,[4] although recent research and commercial applications generally accept synthesizable subsets of ANSI C/C++/SystemC/MATLAB.
Allocation and binding maps the instructions and variables to the hardware components, multiplexers, registers and wires of the data path.
[8] In 1998, Forte Design Systems introduced its Cynthesizer tool which used SystemC as an entry language instead of Verilog or VHDL.
The most common source inputs for high-level synthesis are based on standard languages such as ANSI C/C++, SystemC and MATLAB.
High-level synthesis typically also includes a bit-accurate executable specification as input, since to derive an efficient hardware implementation, additional information is needed on what is an acceptable Mean-Square Error or Bit-Error Rate etc.
The refinement requires additional information on the level of quantization noise that can be tolerated, the valid input ranges etc.
[14] Normally the tools infer from the high level code a Finite State Machine and a Datapath that implement arithmetic operations.
Correspondingly, from one algorithmic description, a variety of hardware microarchitectures can be generated by an HLS compiler according to the directives given to the tool.