Ling adder

In electronics, a Ling adder is a particularly fast binary adder designed using H. Ling's equations and generally implemented in BiCMOS.

[citation needed] Samuel Naffziger of Hewlett-Packard presented an innovative 64 bit adder in 0.5 μm CMOS based on Ling's equations at ISSCC 1996.

The Naffziger adder's delay was less than 1 nanosecond, or 7 FO4.

[1] In Borland Turbo Basic 1.1:

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