MMX (instruction set)

MMX is a single instruction, multiple data (SIMD) instruction set architecture designed by Intel, introduced on January 8, 1997[1][2] with its Pentium P5 (microarchitecture) based line of microprocessors, named "Pentium with MMX Technology".

[citation needed] Alternatively, the saturation arithmetic operations in MMX could[vague] significantly speed up some digital signal processing applications.

[citation needed] To avoid compatibility problems with the context switch mechanisms in existing operating systems, the MMX registers are aliases for the existing x87 floating-point unit (FPU) registers, which context switches would already save and restore.

[11] To maximize performance, software often used the processor exclusively in one mode or the other, deferring the relatively slow switch between them as long as possible.

Both Intel and Metrowerks attempted automatic vectorization in their compilers, but the operations in the C programming language mapped poorly onto the MMX instruction set and custom algorithms as of 2000 typically still had to be written in assembly language.

3DNow is best known for adding single-precision (32-bit) floating-point support to the SIMD instruction-set, among other integer and more general enhancements.

However, the new XMM register-file allowed SSE SIMD-operations to be freely mixed with either MMX or x87 FPU ops.

Intel's and Marvell Technology Group's XScale microprocessor core starting with PXA270 include an SIMD instruction set architecture extension to the ARM architecture core named Intel Wireless MMX Technology (iwMMXt) which functions are similar to those of the IA-32 MMX extension.