PDP-11 architecture

Other 32-bit data are supported as extensions to the basic architecture: floating point in the FPU Instruction Set or long data in the Commercial Instruction Set are stored in more than one format, including an unusual middle-endian format[2][3] sometimes referred to as "PDP-endian."

When an I/O device interrupts a program, it places the address of its vector on the bus to indicate which service routine should take control.

Kernel, Supervisor (where present), and User modes have separate memory maps, and also separate stack pointers (so that a user program cannot cause the system to malfunction by storing an invalid value in the stack pointer register).

Their effects when applied to R6 (the stack pointer, SP) and R7 (the program counter, PC) are set out separately in the following sections.

Relative mode has a simpler syntax and is more typical for referring to program variables and jump destinations.

In computing such addresses relative to the current location, the processor performed relocation on the fly.

A convention enforced by the set of modes the PDP-11 provides is that a stack grows downward—toward lower addresses—as items are pushed onto it.

In the lists in the following two sections, the assembly-language programmer appended B to the instruction symbol to specify a byte operation; for example, MOV became MOVB.

Note: Moving byte to a register sign-extends into bits 8-15 The ADD and SUB instructions use word addressing, and have no byte-oriented variations.

An exception is the multiply instruction; Reg may be odd, but if it is, the high 16 bits of the result are not stored.

The low-order byte is a signed word offset relative to the current location of the program counter.

The specified register is decremented by 1, and if the result is not zero, a reverse branch is taken based on the 6 bit word offset.

The caller then adds the number of arguments to the MARK opcode and pushes that result on the stack.

This loads the value in R5 (pointing to MARK instruction on stack) into the PC and pops the caller's return address into R5.

Clearing or setting none of the condition codes (opcodes 000240 and 000260, respectively) could effectively be considered as no-operation instructions.

A three bit field specifies which register is used as the floating point operand stack pointer.

[6] Strings are represented by two 16-bit integers stored in any two of the general-purpose registers, or as two 16-bit values in subsequent locations in memory.

and then easily make a union via the mask, for instance, selecting the upper and lowercase subsets to produce the complete set of letters.

[6] CIS also includes a set of data types and instructions for manipulating BCD numbers.

This data is also represented by two 16-bit registers or memory locations, with the second number being the A identical to the string case.

CIS also includes a set of six instructions (CVT) to convert BCD numbers between packed and unpacked formats, as well as to and from binary values.

[6] A final set of instructions is provided to load two or three 2-word string descriptors to the internal registers, avoiding the need for multiple MOVs.

For example, routines in the operating system that handle run-time service calls use these instructions to exchange information with the caller.

The following PDP-11 assembly source code is for a subroutine named TOUPPER that converts a null-terminated ASCIIZ character string to upper case.

The following PDP-11 assembly source code demonstrates how the PDP-11's addressing modes can be used to write the same routine with no general registers at all.

PDP-11 processor speed varies by model, memory configuration, op code, and addressing modes.

A single-precision floating add instruction ranges from 2.4 to 5.5 microseconds plus time to fetch the operands.

Higher numbers indicated greater urgency, perhaps that data might be lost or a desired sector might rotate out of contact with the read/write heads unless the processor responds quickly.

The processor saves the program counter (PC) and PSW, enters Kernel mode, and loads new values from the specified vector.

PDP-11 Unix systems also include an assembler (called "as"), structurally similar to MACRO-11, but with different syntax and fewer features.