The PicoBlaze design was originally named KCPSM which stands for "Constant(K) Coded Programmable State Machine" (formerly "Ken Chapman's PSM").
As a resource optimization, it is possible for two PicoBlaze cores to share the same 1k x 18 instruction PROM, taking advantage of the dual-ported implementation of this block on Xilinx FPGAs.
The small implementation size is achieved in part through a fairly rigid separation of the instruction sequencing side (program counter, call-return stack, implied stack pointer, and interrupt enable bit) from the execution side (ALU, register file, scratchpad RAM, Z/C status bits).
The PicoBlaze is poorly suited to programming in compiled languages such as C.[3] In addition to the lack of support for function pointers[dubious – discuss], there are no instructions or addressing modes to expedite a stack-based calling convention.
This does not preclude the use of a Forth-like data stack, and in fact the PicoBlaze is well suited to this approach, if the 64-byte scratchpad memory offers sufficient space.