Many aspects of the MicroBlaze can be user configured: cache size, pipeline depth (3-stage, 5-stage, or 8-stage), embedded peripherals, memory management unit, and bus-interfaces can be customized.
The performance-optimized version expands the execution pipeline to 5 stages, allowing top speeds of more than 700 MHz (on Virtex UltraScale+ FPGA family).
Also, key processor instructions which are rarely used but more expensive to implement in hardware can be selectively added/removed (e.g. multiply, divide, and floating point operations).
This customization enables a developer to make the appropriate design trade-offs for a specific set of host hardware and application software requirements.
With the memory management unit, MicroBlaze is capable of hosting operating systems requiring hardware-based paging and protection, such as the Linux kernel.
Designers use the Vivado IP Integrator to configure and build the hardware specification of their embedded system (processor core, memory-controller, I/O peripherals, etc.)
Xilinx's tools provides the possibility of running software in simulation, or using a suitable FPGA-board to download and execute on the actual system.