RAM parity

The parity bit was originally stored in additional individual memory chips; with the introduction of plug-in DIMM, SIMM, etc.

In the 1970s-80s, RAM reliability was often less-than-perfect; in particular, the 4116 DRAMs which were an industry standard from 1975 to 1983 had a considerable failure rate as they used triple voltages (-5, +5, and +12) which resulted in high operating temperatures.

Some machines that support parity or ECC allow checking to be enabled or disabled in the BIOS, permitting cheaper non-parity RAM to be used.

The SDRAM and DDR modules that replaced the earlier types are usually available either without error-checking or with ECC (full correction, not just parity).

[2] An example of a single-bit error that would be ignored by a system with no error-checking, would halt a machine with parity checking, or would be invisibly corrected by ECC: a single bit is stuck at 1 due to a faulty chip, or becomes changed to 1 due to background or cosmic radiation; a spreadsheet storing numbers in ASCII format is loaded, and the number "8" is stored in the byte which contains the stuck bit as its eighth bit; then another change is made to the spreadsheet and it is stored.

In the case where the error is persistent, server downtime can be scheduled to replace the failing memory unit.

In 1991, Wang won a judgment against Toshiba and NEC over its patents on SIMMs, based in part on its claim of using a ninth RAM chip for parity.