Tomasulo's algorithm

[2] The following are the concepts necessary to the implementation of Tomasulo's algorithm: The Common Data Bus (CDB) connects reservation stations directly to functional units.

Reservation stations hold information needed to execute a single instruction, including the operation and the operands.

The functional unit begins processing when it is free and when all source operands needed for an instruction are real.

The concepts of reservation stations, register renaming, and the common data bus in Tomasulo's algorithm presents significant advancements in the design of high-performance computers.

Reservation stations take on the responsibility of waiting for operands in the presence of data dependencies and other inconsistencies such as varying storage access time and circuit speeds, thus freeing up the functional units.

This is a result of the common data bus and reservation station working together to preserve dependencies as well as encouraging concurrency.

[1]: 33 By tracking operands for instructions in the reservation stations and register renaming in hardware the algorithm minimizes read-after-write (RAW) and eliminates write-after-write (WAW) and Write-after-Read (WAR) computer architecture hazards.

However, it saw a vast increase in usage during the 1990s for 3 reasons: Many modern processors implement dynamic scheduling schemes that are variants of Tomasulo's original algorithm, including popular Intel x86-64 chips.