POWER8 is a family of superscalar multi-core microprocessors based on the Power ISA, announced in August 2013 at the Hot Chips conference.

[4] POWER8 chips comes in 6- or 12-core variants;[5][6] each version is fabricated in a 22 nm silicon on insulator (SOI) process using 15 metal layers.

The CAPI port is used to connect auxiliary specialized processors such as GPUs, ASICs and FPGAs.

[8][9] Units attached to the CAPI bus can use the same memory address space as the CPU, thereby reducing the computing path length.

On October 14, 2016, IBM announced the formation of OpenCAPI, a new organization to spread adoption of CAPI to other platforms.

[11] POWER8 also contains a so-called on-chip controller (OCC), which is a power and thermal management microcontroller based on a PowerPC 405 processor.

[18] The Memory Buffer chip is connected to the processor using a high-speed multi-lane serial link.

[18] For increased availability the link provides "on-the-fly" lane isolation and repair.

Each core is eight-way hardware multithreaded and can be dynamically and automatically partitioned to have either one, two, four or all eight threads active.

[15] The six-core chips are mounted in pairs on dual-chip modules (DCM) in IBM's scale out servers.

Besides that and a slight size increase to 659 mm2, the differences seem minimal compared to previous POWER8 processors.

[31][32][33][34] On 19 January 2014, the Suzhou PowerCore Technology Company announced that they will join the OpenPOWER Foundation and license the POWER8 core to design custom-made processors for use in big data and cloud computing applications.