Specifically, the microarchitecture of the Intel uncore is broken down into a number of modular units.
Multiple internal and external QPI links are managed by physical-layer units, referred to as PBox.
Connections between the PBox, CBox, and one or more iMCs (MBox) are managed by the system configuration controller (UBox) and a router (RBox).
[5] Removal of serial bus controllers from the Intel uncore further enables increased performance by allowing the uncore clock (UCLK) to run at a base of 2.66 GHz, with overclocking limits in excess of 3.44 GHz.
[6] This increased clock rate allows the core to access critical functions (such as the IMC) with significantly less latency, typically reducing core access times to DRAM by 10 ns or more.