Only the original WW-Warp forced a truly lock step sequencing of stages, which severely restricted its programmability but was in a sense the purest “systolic-array” design.
The Warp machines were created by Carnegie Mellon University (CMU), in conjunction with industrial partners G.E., Honeywell and Intel, and funded by the U.S. Defense Advanced Research Projects Agency (DARPA).
Two essentially identical ten-cell WW-Warp were produced in 1986, one by Honeywell and one by G.E., for use at Carnegie Mellon University.
In 1986, Intel was selected, as a result of competitive bidding, to be the industrial partner for the integrated circuit implementation of Warp.
After a number of stepping of the part, about 39 machines, consisting of ten or more C-Step iWarp chips running at 20 MHz, were produced and sold by Intel in 1992 and 1993 to universities, government agencies and industrial research laboratories.
Linear array of ten or more programmable processing elements (PEs), each at 10 MFLOPS (SP).
[5] The iWarp machines were based on a single-chip custom 700,000 transistor microprocessor, designed specifically for the Warp project, that utilized long-instruction-word (LIW) format instructions and tightly integrated communications with the computational processor.
The originally intended application for Warp machines was low-lev el computer vision (convolutions, filtering, etc).
It achieved 16.5 MC/s (million connections per second), meaning that to run one forward and one backward pass over NETtalk's 18,629 weights takes