As with the Zorro II bus, Zorro III allowed for true Plug and Play autodetection (similar to, and prior to, the PC's PCI bus) wherein devices were dynamically allocated the resources they needed on boot.
Just as with Zorro II on 24-bit systems, Zorro III reserved a large chunk of 32-bit real memory address space for large memory mapped cards, a smaller chunk with smaller allocation granularity for "I/O" type board.
Zorro III was never supported on 24-bit address or 16-bit data devices—it required a full 32-bit CPU.
The initial implementation of Zorro III was in Commodore's "Fat" Buster (BUS conTrollER) gate array, assisted by a very high speed PAL and numerous TTL buffer chips for bus buffering, isolation, and multiplexing.
The Amiga 4000 implementation was fundamentally the same, but integrated a second gate-array to replace the TTL buffers.