Apple silicon

To give the iPad high graphics bandwidth, the width of the RAM data bus is double that used in previous ARM11- and ARM9-based Apple devices.

The iPad 2's technical specifications page says the A5 is clocked at 1 GHz,[31] though it can adjust its frequency to save battery life.

The Swift core in the A6 uses a new tweaked instruction set, ARMv7s, featuring some elements of the ARM Cortex-A15 such as support for the Advanced SIMD v2, and VFPv4.

[54] It uses an integrated quad-core PowerVR SGX 554MP4 graphics processing unit (GPU) running at 300 MHz and a quad-channel memory subsystem.

[54][55] Compared to the A6 the A6X is 30% larger, but it continues to be manufactured by Samsung on a high-κ metal gate (HKMG) 32 nm process.

[57] The A7 features an Apple-designed 1.3[58]–1.4[59] GHz 64-bit[60] ARMv8-A[61][62] dual-core CPU,[58] called Cyclone,[61] and an integrated PowerVR G6430 GPU in a four cluster configuration.

[60] The A7 is manufactured by Samsung on a high-κ metal gate (HKMG) 28 nm process[65] and the chip includes over 1 billion transistors on a die 102 mm2 in size.

[68] The A8 features an Apple-designed 1.4[69] GHz 64-bit[70] ARMv8-A[70] dual-core CPU, and an integrated custom PowerVR GX6450 GPU in a four cluster configuration.

Despite that being double the number of transistors compared to the A7, its physical size has been reduced by 13% to 89 mm2 (consistent with a shrink only, not known to be a new microarchitecture).

[77] It uses an integrated custom octa-core PowerVR GXA6850 graphics processing unit (GPU) running at 450 MHz and a dual-channel memory subsystem.

[85][86] It is also the first A-series chip to feature Apple's "Neural Engine," which enhances artificial intelligence and machine learning processes.

It is also featured in the second-generation iPhone SE (released April 15, 2020), the 9th generation iPad (announced September 14, 2021) and in the Studio Display (announced March 8, 2022) The entire A13 SoC features a total of 18 cores – a six-core CPU, four-core GPU, and an eight-core Neural Engine processor, which is dedicated to handling on-board machine learning processes; four of the six cores on the CPU are low-powered cores that are dedicated to handling less CPU-intensive operations, such as voice calls, browsing the Web, and sending messages, while two higher-performance cores are used only for more CPU-intensive processes, such as recording 4K video or playing a video game.

[96] The Apple A14 Bionic is a 64-bit ARM-based SoC that first appeared in the fourth-generation iPad Air and iPhone 12, released on October 23, 2020.

The A16 has 16 billion transistors and is built on TSMC's N4P fabrication process, being touted by Apple as the first 4 nm processor in a smartphone.

Memory is upgraded to LPDDR5 for 50% higher bandwidth and a 7% faster 16-core Neural Engine capable of 17 trillion operations per second.

The GPU was described as their biggest redesign in the history of Apple GPUs, adding hardware accelerated ray tracing and mesh shading support.

[116][125] [158] [103][104][105][102][159] [162] [162] [168] [168] The Apple H series is a family of SoCs with low-power audio processing and wireless connectivity for use in headphones.

[170] Specifically designed for headphones, it has Bluetooth 5.0, supports hands-free "Hey Siri" commands,[171] and offers 30 percent lower latency than the W1 chip used in earlier AirPods.

The M1 Ultra consists of two M1 Max dies connected together by a silicon interposer through Apple's UltraFusion interconnect.

[183] The M2 Ultra consists of two M2 Max dies connected together by a silicon interposer through Apple's UltraFusion interconnect.

[188] [197] [198] [199] The R series is a family of low-latency system on a chips (SoCs) for real-time processing of sensor inputs.

The Apple R1 is dedicated to the real time processing of sensor inputs and delivering extremely low-latency images to the displays.

It includes memory, storage and support circuits like wireless modems and I/O controllers in a sealed integrated package.

[210] The S3 also contains a barometric altimeter, the W2 wireless connectivity processor, and in some models UMTS (3G) and LTE (4G) cellular modems served by a built-in eSIM.

Despite its small size, Tempest uses a 3-wide decode out-of-order superscalar design, which makes it much more powerful than preceding in-order cores.

The SiP also includes new accelerometer and gyroscope functionality that has twice the dynamic range in measurable values of its predecessor, as well as being able to sample data at 8 times the speed.

The T series operates as a secure enclave on Intel-based MacBook and iMac computers released from 2016 onwards.

The chip processes and encrypts biometric information (Touch ID) and acts as a gatekeeper to the microphone and FaceTime HD camera, protecting them from hacking.

[246][247] The Apple U series is a family of systems in a package (SiP) implementing ultra-wideband (UWB) radio.

[108] The APL2298 (also S5L8922) is a 45 nm die shrunk version of the iPhone 3GS SoC[11] and was introduced on September 9, 2009, at the launch of the third-generation iPod Touch.